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th71101 315/433mhz fsk/ask receiver 39010 71101 page 1 of 21 data sheet rev. 018 jun/13 features single-conversion superhet architecture for low ex ternal component count fsk demodulation with phase-coincidence demodulato r low current consumption in active mode and very lo w standby current switchable lna gain for improved dynamic range rssi allows signal strength indication and ask det ection 32-pin low profile quad flat package (lqfp) ordering code product code temperature code package code option code packing form code th71101 e ne caa-000 re th71101 e ne caa-000 tr legend : temperature code: e for temperature range -40c to 85c package code: ne for lqfp packing form: re for reel, tr for tray ordering example: th71101ene-caa-000-re application examples general digital data transmission tire pressure monitoring systems (tpms) remote keyless entry (rke) wireless access control alarm and security systems garage door openers remote controls home and building automation low-power telemetry systems pin description general description the th71101 fsk/ask single-conversion superheterody ne receiver ic is designed for applications in the european 433mhz industrial-scientific-medical (ism) band, according to the en 300 220 telecommunicatio ns standard. it can also be used for any other system with carrier frequencies ranging from 300mhz to 450 mhz (e.g. for applications according to fcc part 15 and arib std-t67). vee_lnac out_lna in_mix1 vee_mix if_1p if_1n vcc_mix gain_lna v c c _ b i a s v e e _ b i a s o a p o a n o u t _ o a r s s i o u t p vee_ro ro enrx vee_lna in_lna vcc_lna lf vcc_pll out_ifa fbc1 fbc2 in_ifa vee_if out_mix2 vcc_if 1 32 8 9 24 25 th71101 17 16
th71101 315/433mhz fsk/ask receiver 39010 71101 page 2 of 21 data sheet rev. 018 jun/13 document content 1 theory of operation ................................ ................................................... ................3 1.1 general ............................................ ................................................... ............................... 3 1.2 technical data overview ............................ ................................................... .................... 3 1.3 block diagram...................................... ................................................... ........................... 4 1.4 mode configurations ................................ ................................................... ....................... 4 1.5 lna gain control................................... ................................................... ........................ 4 1.6 frequency planning ................................. ................................................... ....................... 4 1.6.1 selected frequency plans ........................... ................................................... ............................. 5 1.6.2 maximum frequency coverage......................... ................................................... ....................... 5 2 pin definitions and descriptions ................... ................................................... ........6 3 technical data..................................... ................................................... ....................9 3.1 absolute maximum ratings........................... ................................................... .................. 9 3.2 normal operating conditions ........................ ................................................... .................. 9 3.3 crystal parameters ................................. ................................................... ........................ 9 3.4 dc characteristics ................................. ................................................... ....................... 10 3.5 ac system characteristics.......................... ................................................... .................. 11 4 test circuits ...................................... ................................................... ....................12 4.1 standard fsk reception............................. ................................................... .................. 12 4.1.1 standard fsk application circuit................... ................................................... ......................... 12 4.1.2 standard fsk component list ........................ ................................................... ....................... 13 4.2 narrow band fsk reception .......................... ................................................... .............. 14 4.2.1 narrow band fsk application circuit ................ ................................................... ..................... 14 4.2.2 narrow band fsk component list..................... ................................................... .................... 15 4.3 ask reception...................................... ................................................... ........................ 16 4.3.1 ask application circuit ............................ ................................................... ............................... 16 4.3.2 ask component list................................. ................................................... .............................. 17 5 package description ................................ ................................................... .............18 5.1 soldering information .............................. ................................................... ...................... 18 6 standard information regarding manufacturability of melexis products with different soldering processes ...................... ................................................... ........19 7 esd precautions .................................... ................................................... ...............19 8 disclaimer ......................................... ................................................... .....................20
th71101 315/433mhz fsk/ask receiver 39010 71101 page 3 of 21 data sheet rev. 018 jun/13 1 theory of operation 1.1 general with the th71101 receiver chip, various circuit con figurations can be arranged in order to meet a numb er of different customer requirements. for fsk reception the if tank used in the phase coincidence demodulat or can be constituted by an external ceramic discrimin ator. in ask configuration, the rssi signal is fed to an ask detector, which is constituted by the operation al amplifier. a double-conversion variant, called th71102, is als o available. this receiver ic allows a higher degre e of image rejection, achieved in conjunction with an rf front-end filter. both rxics have the same die. at the th71102, the second mixer (mix2) is used to down-co nvert the first if (if1) to the second if (if2). at the th71101, mix2 operates as an amplifier. efficient rf front-end filtering is realized by usi ng a saw, ceramic or helix filter in front of the l na and by adding an lc filter at the lna output. the th71101 receiver ic consists of the following b uilding blocks: pll synthesizer (pll synth) for generation of the local oscillator signal lo, parts of the pll synth are: the high-frequency vco1, the feedback divider div_16, a phase-frequency detector (pfd) with charge pump (cp) and a crystal-based reference osci llator (ro) low-noise amplifier (lna) for high-sensitivity rf signal reception first mixer (mix1) for down-conversion of the rf s ignal to the if if pre amplifier which is a mixer cell (mix2) that operates as an amplifier if amplifier (ifa) to amplify and limit the if sig nal and for rssi generation phase coincidence demodulator (demod) with third m ixer (mix3) to demodulate the if signal operational amplifier (oa) for data slicing, filte ring and ask detection bias circuitry for bandgap biasing and circuit shu tdown 1.2 technical data overview input frequency range: 300to 450 mhz power supply range: 2.3 to 5.5 v @ ask temperature range: -40 to +85 c standby current: 50 na operating current: 6.5 ma @ low gain 8.2 ma @ high gain sensitivity: -113 dbm @ ask 1) -107 dbm @ fsk 2) maximum data rate: 260 kbps nrz @ ask 180 kbps nrz @ fsk range of if: 400 khz to 22 mhz maximum input level: -10 dbm @ ask 0 dbm @ fsk image rejection: > 45 db (e.g. with 433.92 mhz saw front-end filter and at 10.7 mhz if) spurious emission: < -70 dbm input frequency acceptance range: up to 100 khz rssi range: 70 db fsk deviation range: 2.5 khz to 80 khz 1) at 4 kbps nrz, ber = 3 ? 10 -3 , 180 khz if filter bw, without saw front-end-filte r loss 2) at 4 kbps nrz, ber = 3 ? 10 -3 , 20 khz fsk deviation, 180 khz if filter bw, withou t saw front-end-filter loss
th71101 315/433mhz fsk/ask receiver 39010 71101 page 4 of 21 data sheet rev. 018 jun/13 1.3 block diagram fig. 1: th71101 block diagram 1.4 mode configurations enrx mode description 0 rx standby rx disabled 1 rx active rx enable note: enrx are pulled down internally 1.5 lna gain control v gain_lna mode description < 0.8 v high gain lna set to high gain > 1.4 v low gain lna set to low gain note: hysteresis between gain modes to ensure stability 1.6 frequency planning frequency planning is straightforward for single-co nversion applications because there is only one if that can be chosen, and then the only possible choice is low-side or high-side injection of the lo signal ( which is now the one and only lo signal in the receiver). the receiver?s single-conversion architecture requi res careful frequency planning. besides the desired rf input signal, there are a number of spurious signal s that may cause an undesired response at the outpu t. among them is the image of the rf signal that must be suppressed by the rf front-end filter. mix1 12 in_lna 4 31 8 v c c _ m i x 5 v e e _ m i x i n _ m i x 1 6 7 11 if out_mix2 vee_if 13 i n _ i f a f b c 1 17 27 28 26 if if1p if1n 10 9 v c c _ l n a vee_lna lo 25 vcc_bias v c c _ p l l e n r x bias 30 vee_bias v e e _ r o vco1 pfd ro 22 ro lf 29 cp 32 18 19 oap oan out_oa oa 20 lna gain_lna o u t _ l n a 3 2 vee _ l n a c 1 mix2 14 15 16 o u t _ i f a 23 24 outp outn in_dem mix3 ifa r s s i 21 div_16
th71101 315/433mhz fsk/ask receiver 39010 71101 page 5 of 21 data sheet rev. 018 jun/13 by using the internal pll synthesizer of the th7110 1 with the fixed feedback divider ratio of n = 16 (div_16), two types of down-conversion are possible : low-side injection of lo and high-side injection of lo. the following table summarizes some equations that are useful to calculate the crystal reference frequ ency (ref) and the lo frequency, for a given rf and if. injection type low high ref (rf ? if)/16 (rf + if)/16 lo 16 ? ref 16 ? ref if rf ? lo lo ? rf rf image rf ? 2if rf + 2if 1.6.1 selected frequency plans the following table depicts crystal, lo and image s ignals considering the examples of 315 mhz and 433.92 mhz rf reception at if = 10.7 mhz. signal type rf = 315 mhz rf = 315 mhz rf = 433.92 mhz rf = 433.92 mhz injection type low high low high ref / mhz 19.01875 20.35625 26.45125 27.78875 lo / mhz 304.3 325.7 423.22 444.62 rf image / mhz 293.6 336.4 412.52 455.32 the selection of the reference crystal frequency is based on some assumptions. as for example: the ima ge frequency should not be in a radio band where stron g interfering signals might occur (because they cou ld represent parasitic receiving signals), the lo sign al should be in the range of 300 mhz to 450 mhz (be cause this is the optimum frequency range of the vco1). f urthermore the if should be as high as possible to achieve highest rf image rejection. the columns in bold depict the selected frequency plans to receive at 315 mhz and 433.92 mhz, respectively. 1.6.2 maximum frequency coverage parameter f min f max injection type high low rf / mhz 289.3 460.7 ref / mhz 18.75 28.125 lo / mhz 300 450 if/ mhz 10.7 10.7
th71101 315/433mhz fsk/ask receiver 39010 71101 page 6 of 21 data sheet rev. 018 jun/13 2 pin definitions and descriptions pin no. name i/o type functional schematic description 3 out_lna analog output lna open-collector output, to be connected to external lc tank that resonates at rf 31 in_lna analog input lna input, approx. 26 single-ended 1 vee_lnac ground out_lna 3 5k vee_lnac 1 in_lna 31 ground of lna core (cas- code) 2 gain_lna analog input gain_lna 2 400 lna gain control (input with hysteresis) rx standby: no pull-up rx active: pull-up 4 in_mix1 analog input in_mix1 4 500a 13 13 mix1 input, approx. 33 single-ended 5 vee_mix ground ground of mix1 and mix2 6 if1p analog i/o open-collector output, to be connected to external lc tank that resonates at first if 7 if1n analog i/o 20p 20p 2x500a if1p 6 vee vcc vee if1n 7 open-collector output, to be connected to external lc tank that resonates at first if 8 vcc_mix supply positive supply of mix1 and mix2 9 out_mix2 analog output 130 6.8k out_mix2 9 230a mix2 output, approx. 330 output impedance 10 vee_if ground ground of ifa and demod
th71101 315/433mhz fsk/ask receiver 39010 71101 page 7 of 21 data sheet rev. 018 jun/13 pin no. name i/o type functional schematic description 11 in_ifa analog input ifa input, approx. 2.2k input impedance 12 fbc1 analog i/o to be connected to external ifa feedback capacitor 13 fbc2 analog i/o 2.2k 2.2k 200a in_ifa 11 vee vee vcc vee vcc 12 fbc1 fbc2 13 vee vcc to be connected to external ifa feedback capacitor 14 vcc_if supply positive supply of ifa and demod 15 out_ifa analog i/o out_ifa 15 40a ifa output and mix3 input (of demod) 16 in_dem analog input in_dem 16 47k demod input, to mix3 core 17 vcc_bias supply positive supply of general bias system and oa 18 out_oa analog output out_oa 18 50 oa output, 40ua current drive capability 19 oan analog input negative oa input 20 oap analog input 20a 19 oan 50 20 oap 50 positive oa input
th71101 315/433mhz fsk/ask receiver 39010 71101 page 8 of 21 data sheet rev. 018 jun/13 pin no. name i/o type functional schematic description 21 rssi analog output i (pi) rssi 21 50 36k rssi output, for rssi and ask detection, approx. 36k output impedance 22 vee_bias ground ground of general bias system and oa 23 outp analog output fsk positive output, output impedance of 100k to 300k 24 outn analog output outp outn 23 24 50 20a 20a fsk negative output, output impedance of 100k to 300k 25 vee_ro ground ground of div, pfd, ro and charge pump 26 ro analog input ro 26 30p 30p 50k ro input, colpitts type oscillator with internal feed- back capacitors 27 vcc_pll supply positive supply of div, pfd, ro and charge pump 28 enrx digital input enrx 28 1.5k mode control input, cmos-compatible with internal pull-down circuit 29 lf analog i/o lf 29 200 400 4p charge pump output and vco1 control input 30 vee_lna ground ground of lna biasing 32 vcc_lna supply positive supply of lna biasing
th71101 315/433mhz fsk/ask receiver 39010 71101 page 9 of 21 data sheet rev. 018 jun/13 3 technical data 3.1 absolute maximum ratings parameter symbol condition / note min max unit supply voltage v cc 0 7.0 v input voltage v in - 0.3 v cc +0.3 v input rf level p irf @ lna input 10 dbm storage temperature t stg -40 +125 c junction temperature t j +150 c thermal resistance r thja 60 k/w power dissipation p diss 0.1 w v esd1 human body model, 3) -1.0 +1.0 electrostatic discharge v esd2 human body model, 4) -0.75 +0.75 kv 3) all pins except out_lna, if1p and if1n 4) pin out_lna, if1p and if1n 3.2 normal operating conditions parameter symbol condition min max unit 0 c to 85 c 2.5 5.5 -20 c to 85 c 2.6 5.5 v cc, fsk -40 c to 85 c 2.7 5.5 supply voltage v cc, ask -40 c to 85 c 2.3 5.5 v operating temperature t a -40 +85 oc input low voltage (cmos) v il enrx pin 0.3*v cc v input high voltage (cmos) v ih enrx pin 0.7*v cc v input frequency range f i 289.3 460.7 mhz if range f if 0.4 22 mhz xosc frequency f ref set by the crystal 18.75 28.125 mhz vco frequency f lo f lo = 16 ? f ref 300 450 mhz frequency deviation ? f 2.5 80 khz fsk data rate r fsk nrz, c15 = nip, 5) 180 kbps ask data rate r ask nrz, c16 = nip, 5) 260 kbps 5) b if = 400 khz, p in = -90 dbm 3.3 crystal parameters parameter symbol condition min max unit crystal frequency f 0 fundamental mode, at 18.75 28.125 mhz load capacitance c l 10 15 pf static capacitance c 0 7 pf series resistance r 1 50
th71101 315/433mhz fsk/ask receiver 39010 71101 page 10 of 21 data sheet rev. 018 jun/13 3.4 dc characteristics all parameters under normal operating conditions, u nless otherwise stated; typical values at t a = 23 c and v cc = 3 v parameter symbol condition min typ max unit operating currents standby current i sby enrx=0 50 100 na supply current at low gain i cc, low enrx=1 gain_lna=1 4.0 6.5 12.0 ma supply current at high gain i cc, high enrx=1 gain_lna=0 4.5 8.2 14.0 ma digital pin characteristics input low voltage cmos v il enrx pin -0.3 0.3*v cc v input high voltage cmos v ih enrx pin 0.7*v cc v cc +0.3 v pull down current enrx pin i pden enrx=1 0.1 2 10 a low level input current enrx pin i inlen enrx=0 0.05 a analog pin characteristics high level input current gain_lna pin i inhgain gain_lna=1 0.05 a pull up current gain_lna pin active i pugaina gain_lna=0 enrx=1 0.08 0.15 0.3 a pull up current gain_lna pin standby i pugains gain_lna=0 enrx=0 0.05 a high gain input voltage v ihgain enrx=1 0.7 v low gain input voltage v ilgain enrx=1 1.5 v opamp characteristics opamp input offset voltage v offs -35 35 mv opamp input offset current i offs i oap ? i oan -50 50 na opamp input bias current i bias 0.5 * (i oap + i oan ) -150 150 na rssi characteristics rssi voltage at low input level v rssi, low p i = -65 dbm, gain_lna=1 0.5 1.0 1.5 v rssi voltage at high input level v rssi, high p i = -35 dbm, gain_lna=1 1.2 1.9 2.5 v
th71101 315/433mhz fsk/ask receiver 39010 71101 page 11 of 21 data sheet rev. 018 jun/13 3.5 ac system characteristics all parameters under normal operating conditions, u nless otherwise stated; typical values at t a = 23 c and v cc = 3 v, rf at 433.92 mhz; saw frond-end filter loss and if at 10.7 mhz; all parameters based on test circuits as shown in f ig. 2, fig.3 and fig. 5 parameter symbol condition min typ max unit receive characteristics input sensitivity ? fsk (standard) p min, st b if = 180khz, ? f = 20khz, 4kbps nrz, ber 3 ? 10 -3 , 6) -104 dbm input sensitivity ? fsk (narrow band) p min, nb b if = 30khz, ? f = 5khz, 4kbps nrz, ber 3 ? 10 -3 , 6) -108 dbm input sensitivity ? ask p min, ask b if = 180khz, 4kbps nrz, ber 3 ? 10 -3 , 6) -110 dbm maximum input signal ? fsk p max, fsk ber 3 ? 10 -3 gain_lna = 1 0 dbm maximum input signal ? ask p max, ask ber 3 ? 10 -3 gain_lna = 1 -10 dbm spurious emission p spur -70 dbm image rejection ? p imag 45 db start-up parameters crystal start-up time t xtl enrx from 0 to 1 0.9 ms receiver start-up time t rx enrx from 0 to 1, depends on data slicer time constant, valid data at output t xtl + r4 c17 pll parameters vco gain k vco 250 mhz/v charge pump current i cp 60 a 6) incl. 3 db loss of front-end saw filter
th71101 315/433mhz fsk/ask receiver 39010 71101 page 12 of 21 data sheet rev. 018 jun/13 4 test circuits 4.1 standard fsk reception 4.1.1 standard fsk application circuit fig. 2: test circuit for fsk reception circuit features ? tolerates input frequency variations ? well-suited for nrz, manchester and similar codes cerfil outp vee out_lna in_mix1 vee if1p if1n vcc gain_lna vee out_mix2 in_ifa fbc1 fbc2 vcc out_ifa lf vee in_lna vcc vee enrx vcc vcc vee oap oan out_oa rssi 32 31 30 29 28 27 26 25 17 18 19 20 21 22 23 24 9 10 11 12 13 14 15 16 8 1 2 3 4 5 6 7 ro c12 cerdis xtal c11 c10 c9 cb* vcc c16 c15 r4 r5 c1 c3 r1 rl2 rl1 c7 l3 c6 c17 r2 th71101 enrx vcc vcc vcc vcc fsk output rssi outp * each vcc pin with blocking cap of 330pf * one global vcc blocking cap of 33nf l2 l1 rf input 50 sawfil 4 6 1 3
th71101 315/433mhz fsk/ask receiver 39010 71101 page 13 of 21 data sheet rev. 018 jun/13 4.1.2 standard fsk component list part size value @ 433.92 mhz tolerance description c1 0805 27 pf 5% crystal series capacitor c3 0603 1 nf 10% loop filter capacitor c6 0603 4.7 pf 5% lna output tank capacitor c7 0603 2.2 pf 5% mix1 input matching capacitor c9 0603 33 nf 10% ifa feedback capacitor c10 0603 1 nf 10% ifa feedback capacitor c11 0603 1 nf 10% ifa feedback capacitor c12 0805 10 pf 5% demod phase-shift capacitor c15 0805 100 pf 5% demodulator output low-pass capacitor, this value for data rates < 20 kbps nrz c16 0805 1.5 nf 10% rssi output low-pass capacitor c17 0805 10 nf 10% data slicer capacitor, this value for data rates > 0.8 kbps nrz r1 0603 10 k 5% loop filter resistor r2 0603 330 5% optional cerfil output matching resistor r4 0805 330 k 5% data slicer resistor r5 0805 220 k 5% loading resistor rl1 0805 470 5% mix1 bias resistor rl2 0805 470 5% mix1 bias resistor l1 0603 68 nh 5% l2 0603 82 nh 5% saw filter matching inductor from wrth-elektronik (we-ki series), or equivalent part l3 0603 15 nh 5% lna output tank inductor from wrth-elektronik (we- ki series), or equivalent part xtal smd 6x3.5 26.45125 mhz @ rf = 433.92 mhz 25ppm cal. 30ppm temp. fundamental-mode crystal from telcona/horizon or equivalent part sawfil smd 3x3 safcc433mbl0x00 (f 0 = 433.92 mhz) b 3db = 840 khz low-loss saw filter from murata, or equi valent part cerfil smd 3.45x3.1 sfecf10m7ha00 b 3db = 180 khz ceramic filter from murata, or equivalent part cerdis smd 4.5x2 cdscb10m7ga135 ceramic discriminator from murata, or equivalent part ? for component values for other frequencies, please refer to the evb descriptions
th71101 315/433mhz fsk/ask receiver 39010 71101 page 14 of 21 data sheet rev. 018 jun/13 4.2 narrow band fsk reception 4.2.1 narrow band fsk application circuit fig. 3: test circuit for fsk reception (narrow band ) circuit features ? applicable for narrow band fsk cerfil outp vee out_lna in_mix1 vee if1p if1n vcc gain_lna vee out_mix2 in_ifa fbc1 fbc2 vcc out_ifa lf vee in_lna vcc vee enrx vcc vcc vee oap oan out_oa rssi 32 31 30 29 28 27 26 25 17 18 19 20 21 22 23 24 9 10 11 12 13 14 15 16 8 1 2 3 4 5 6 7 ro c12 xtal c11 c10 c9 cb* vcc c16 c15 r4 c1 c3 r1 rl2 rl1 c7 l3 c6 c17 r2 th71101 enrx vcc vcc vcc vcc fsk output rssi outp * each vcc pin with blocking cap of 330pf * one global vcc blocking cap of 33nf cp cerdis l2 l1 rf input 50 sawfil 4 6 1 3
th71101 315/433mhz fsk/ask receiver 39010 71101 page 15 of 21 data sheet rev. 018 jun/13 4.2.2 narrow band fsk component list part size value @ 433.92 mhz tolerance description c1 0805 27 pf 5% crystal series capacitor c3 0603 1 nf 10% loop filter capacitor c6 0603 4.7 pf 5% lna output tank capacitor c7 0603 2.2 pf 5% mix1 input matching capacitor c9 0603 33 nf 10% ifa feedback capacitor c10 0603 1 nf 10% ifa feedback capacitor c11 0603 1 nf 10% ifa feedback capacitor c12 0805 1.5 pf 5% demod phase-shift capacitor c15 0805 220 pf 5% demodulator output low-pass capacitor, this value for data rates < 10 kbps nrz c16 0805 1.5 nf 10% rssi output low-pass capacitor c17 0805 10 nf 10% data slicer capacitor, this value for data rates > 0.8 kbps nrz cp 0603 6.8 - 8.2 pf 5% ceramic resonator loading capacitor r1 0603 10 k 5% loop filter resistor r2 0603 330 5% optional cerfil output matching resistor r4 0805 330 k 5% data slicer resistor rl1 0805 470 5% mix1 bias resistor rl2 0805 470 5% mix1 bias resistor l1 0603 68 nh 5% l2 0603 82 nh 5% saw filter matching inductor from wrth-elektronik (we-ki series), or equivalent part l3 0603 15 nh 5% lna output tank inductor from wrth-elektronik (we- ki series), or equivalent part xtal smd 6x3.5 26.45125 mhz @ rf = 433.92 mhz 25ppm cal. 30ppm temp. fundamental-mode crystal from telcona/horizon or equivalent part sawfil smd 3x3 safcc433mbl0x00 (f 0 = 433.92 mhz) b 3db = 840 khz low-loss saw filter from murata, or equi valent part sfkla10m7nl00 b 3db = 30 khz ceramic filter from murata, or equivalent part cerfil leaded type sfvla10m7lf00 b 3db = 80 khz optional, ceramic filter from murata, or equivalent part cerdis smd 4.5x2 cdscb10m7ga135 ceramic discriminator from murata, or equivalent part ? for component values for other frequencies, please refer to the evb descriptions
th71101 315/433mhz fsk/ask receiver 39010 71101 page 16 of 21 data sheet rev. 018 jun/13 4.3 ask reception 4.3.1 ask application circuit fig. 5: test circuit for ask reception cerfil outp vee out_lna in_mix1 vee if1p if1n vcc gain_lna vee out_mix2 in_ifa fbc1 fbc2 vcc out_ifa lf vee in_lna vcc vee enrx vcc vcc vee oap oan out_oa rssi 32 31 30 29 28 27 26 25 17 18 19 20 21 22 23 24 9 10 11 12 13 14 15 16 8 1 2 3 4 5 6 7 ro xtal c11 c10 c9 cb* vcc c16 r4 c1 c3 r1 rl2 rl1 c7 l3 c6 c17 r2 th71101 enrx vcc vcc vcc vcc ask output rssi * each vcc pin with blocking cap of 330pf * one global vcc blocking cap of 33nf l2 l1 rf input 50 sawfil 4 6 1 3
th71101 315/433mhz fsk/ask receiver 39010 71101 page 17 of 21 data sheet rev. 018 jun/13 4.3.2 ask component list part size value @ 433.92 mhz tolerance description c1 0805 27 pf 5% crystal series capacitor c3 0603 1 nf 10% loop filter capacitor c6 0603 4.7 pf 5% lna output tank capacitor c7 0603 2.2 pf 5% mix1 input matching capacitor c9 0603 33 nf 10% ifa feedback capacitor c10 0603 1 nf 10% ifa feedback capacitor c11 0603 1 nf 10% ifa feedback capacitor c16 0805 1.5 nf 10% rssi output low-pass capacitor, this value for data rates < 10 kbps nrz c17 0805 10 nf 10% data slicer capacitor, this value for data rates > 0.8 kbps nrz r1 0603 10 k 5% loop filter resistor r2 0603 330 5% optional cerfil output matching resistor r4 0805 330 k 5% data slicer resistor rl1 0805 470 5% mix1 bias resistor rl2 0805 470 5% mix1 bias resistor l1 0603 68 nh 5% l2 0603 82 nh 5% saw filter matching inductor from wrth-elektronik (we-ki series), or equivalent part l3 0603 15 nh 5% lna output tank inductor from wrth-elektronik (we- ki series), or equivalent part xtal smd 6x3.5 26.45125 mhz @ rf = 433.92 mhz 25ppm cal. 30ppm temp. fundamental-mode crystal from telcona/horizon or equivalent part sawfil smd 3x3 safcc433mbl0x00 (f 0 = 433.92 mhz) b 3db = 840 khz low-loss saw filter from murata, or equi valent part smd 3.45x3.1 sfecf10m7ha00 b 3db = 180 khz ceramic filter from murata, or equivalent part cerfil leaded type sfvla10m7lf00 b 3db = 80 khz optional, ceramic filter from murata, or equivalent part ? for component values for other frequencies, please refer to the evb descriptions
th71101 315/433mhz fsk/ask receiver 39010 71101 page 18 of 21 data sheet rev. 018 jun/13 5 package description the device th71101 is rohs compliant. fig. 6: lqfp32 (low profile quad flat package) all dimension in mm, coplanarty < 0.1mm e1, d1 e, d a a1 a2 e b c l min 1.40 0.05 1.35 0.30 0.09 0.45 0 max 7.00 9.00 1.60 0.15 1.45 0.8 0.45 0.20 0.75 7 all dimension in inch, coplanarty < 0.004? min 0.055 0.002 0.053 0.012 0.0035 0.018 0 max 0.276 0.354 0.063 0.006 0.057 0.031 0.018 0.0079 0.030 7 5.1 soldering information ? the device th71101 is qualified for msl3 with sold ering peak temperature 260 deg c according to jedec j-std-20. 1 32 25 17 24 8 9 16 d d1 e1 e b e a2 a a1 l c 0.25 (0.0098) 12 1 + 12 1 + .10 (.004)
th71101 315/433mhz fsk/ask receiver 39010 71101 page 19 of 21 data sheet rev. 018 jun/13 6 standard information regarding manufacturability of melexis products with different soldering processes our products are classified and qualified regarding soldering technology, solderability and moisture s ensitiv- ity level according to following test methods: reflow soldering smd?s (s urface m ount d evices) ? ipc/jedec j-std-020 moisture/reflow sensitivity classification for nonh ermetic solid state surface mount devices (classification reflow profiles according to table 5-2) ? eia/jedec jesd22-a113 preconditioning of nonhermetic surface mount device s prior to reliability testing (reflow profiles according to table 2) wave soldering smd?s (s urface m ount d evices) and thd?s (t hrough h ole d evices) ? en60749-20 resistance of plastic- encapsulated smd?s to combin ed effect of moisture and soldering heat ? eia/jedec jesd22-b106 and en60749-15 resistance to soldering temperature for through-hol e mounted devices iron soldering thd?s (t hrough h ole d evices) ? en60749-15 resistance to soldering temperature for through-hol e mounted devices solderability smd?s (s urface m ount d evices) and thd?s (t hrough h ole d evices) ? eia/jedec jesd22-b102 and en60749-21 solderability for all soldering technologies deviating from above mentioned standard conditions (regarding peak temp era- ture, temperature gradient, temperature profile etc ) additional classification and qualification tests have to be agreed upon with melexis. the application of wave soldering for smd?s is allo wed only after consulting melexis regarding assuran ce of adhesive strength between device and board. melexis is contributing to global environmental con servation by promoting lead free solutions. for more in- formation on qualifications of rohs compliant products (rohs = european directive on t he restriction of the use of certain hazardous substances) please vis it the quality page on our website: http://www.melexis.com/quality.aspx 7 esd precautions electronic semiconductor products are sensitive to electro static discharge (esd). always observe electro static discharge control pro cedures whenever handling semiconductor products.
th71101 315/433mhz fsk/ask receiver 39010 71101 page 20 of 21 data sheet rev. 018 jun/13 8 disclaimer devices sold by melexis are covered by the warranty and patent indemnification provisions appearing in its term of sale. melexis makes no warranty, express, s tatutory, implied, or by description regarding the infor- mation set forth herein or regarding the freedom of the described devices from patent infringement. me lexis reserves the right to change specifications and pri ces at any time and without notice. therefore, prio r to de- signing this product into a system, it is necessary to check with melexis for current information. thi s product is intended for use in normal commercial applicatio ns. applications requiring extended temperature ran ge, unusual environmental requirements, or high reliabi lity applications, such as military, medical life-s upport or life-sustaining equipment are specifically not reco mmended without additional processing by melexis fo r each application. the information furnished by melexis is believed to be correct and accurate. however, melexis shall no t be liable to recipient or any third party for any dama ges, including but not limited to personal injury, property damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequ ential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the t echnical data herein. no obligation or liability to recipien t or any third party shall arise or flow out of mel exis? rendering of technical or other services. ? 2013 melexis nv. all rights reserved. for the latest version of this document, go to our website at www.melexis.com or for additional information contact melexis direc t: europe, africa, asia: america: phone: +32 1367 0495 phone: +1 248 306 5400 e-mail: sales_europe@melexis.com e-mail: sales_usa @melexis.com iso/ts 16949 and iso14001 certified

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